Digital Fundamentals
Course Objectives for the subject Digital Fundamentals is to introduce the fundamental concepts and methods for design of digital circuits and a pre-requisite for computer organization and architecture, microprocessor systems.
To provide the concept of designing Combinational and sequential circuits. To provide basic knowledge of how digital building blocks are described in VHDL. Course Outcomes for the subject Digital Logic Design and Analysis At the end of the course student should be able1. To understand different number systems and their conversions. To analyze and minimize Boolean expressions. To design and analyze combinational circuits. To design and analyze sequential circuits. To understand the basic concepts of VHDL. To study basics of TTL and CMOS Logic families.
Digital Logic is the basis of electronic systems, such as computers and cell phones. Digital Logic is rooted in binary code, a series of zeroes and ones each having an opposite value. This system facilitates the design of electronic circuits that convey information, including logic gates. Digital Logic gate functions include and, or and not. The value system translates input signals into specific output. Digital Logic facilitates computing, robotics and other electronic applications. Digital Logic Design is foundational to the fields of electrical engineering and computer engineering. Digital Logic designers build complex electronic components that use both electrical and computational characteristics. These characteristics may involve power, current, logical function, protocol and user input. Digital Logic Design is used to develop hardware, such as circuit boards and microchip processors. This hardware processes user input, system protocol and other data in computers, navigational systems, cell phones or other high-tech systems.
Module Number Systems and Codes Introduction to number system and conversions consists of the following subtopics Binary, Octal, Decimal and Hexadecimal number Systems, Binary arithmetic: addition, subtraction (1‟s and 2‟s complement), multiplication and division. Octal and Hexadecimal arithmetic: Addition and Subtraction (7‟s and 8‟s complement method for octal) and (15‟s and 16‟s complement method for Hexadecimal). Codes: Gray Code, BCD Code, Excess-3 code, ASCII Code. Error Detection and Correction: Hamming codes. Module Boolean Algebra and Logic Gates consists of the following subtopics Theorems and Properties of Boolean Algebra, Boolean functions, Boolean function reduction using Boolean laws, Canonical forms, Standard SOP and POS form. Basic Digital gates: NOT , AND , OR , NAND , NOR , EXOR , EXNOR, positive and negative logic, K-map method 2 variable, 3 variable, 4 variable, Don‟t care condition, Quine-McClusky Method, NANDNOR Realization.
Module Combinational Logic Design consists of the following subtopics Introduction, Half and Full Adder, Half subtractor Full Subtractor, Four Bit Ripple adder, look ahead carry adder, 4 bit adder subtractor, one digit BCD Adder, Multiplexer, Multiplexer tree, Demultiplexer, Demultiplexer tree, Encoders Priority encoder, Decoders, One bit, Two bit , 4-bit Magnitude Comparator, ALU IC 74181. Module Sequential Logic Design consists of the following subtopics Introduction: SR latch, Concepts of Flip Flops: SR, D, J-K, T, Truth Tables and Excitation Tables of all types, Race around condition, Master Slave J-K Flip Flops, Timing Diagram, Flip-flop conversion, State machines, state diagrams, State table, concept of Moore and Mealy machine. Counters : Design of Asynchronous and Synchronous Counters, Modulus of the Counters, UP- DOWN counter, Shift Registers: SISO, SIPO, PIPO, PISO Bidirectional Shift Register, Universal Shift Register, Ring and twisted ring/Johnson Counter, sequence generator. Module Introduction to VHDL consists of the following subtopics Introduction: Fundamental building blocks Library, Entity, Architecture, Modeling Styles, Concurrent and sequential statements, simple design examples for combinational circuits and sequential circuits. Module Digital Logic Families consists of the following subtopics Introduction: Terminologies like Propagation Delay, Power Consumption, Fan in and Fan out , current and voltage parameters, noise margin, with respect to TTL and CMOS Logic and their comparison.
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Course Features
- Lectures 26
- Quiz 0
- Duration 26 weeks
- Skill level All levels
- Students 57
- Assessments Yes
Curriculum
- 3 Sections
- 26 Lessons
- 26 Weeks
Expand all sectionsCollapse all sections
- module 110
- 2.1DLDA Introduction5 Minutes
- 2.2Binary and Decimal system21 Minutes
- 2.3Octal Number System18 Minutes
- 2.4Hexadecimal Number System10 Minutes
- 2.5BCD Arithmetic11 Minutes
- 2.6How to find 1’s and 2’s Complement12 Minutes
- 2.7Subtraction using 1’s & 2’s Complement10 Minutes
- 2.8Codes10 Minutes
- 2.9Codes Non-Weighted6 Minutes
- 2.10BCD XS-3 and Gray Code13 Minutes
- module 27
- module 39
- 5.1S-R Latch Using NOR Gate7 Minutes
- 5.2Conversion of JK to D Flip Flop5 Minutes
- 5.3Conversion of SR to JK Flip Flop8 Minutes
- 5.4Conversion of SR to T Flip Flop7 Minutes
- 5.5Conversion of JK to SR Flip Flop8 Minutes
- 5.63 Bit Asynchronous Up Counter10 Minutes
- 5.74 Bit Asynchronous Up Counter8 Minutes
- 5.8How to pass DLDA21 Minutes
- 5.9Important Question7 Minutes